the 4n25 , 4n26, 4n27 and 4n28 devices consist of a gallium arsenide infrared emitting diode optically coupled to a monolithic silicon phototransistor detector. ? most economical optoisolator choice for medium speed, switching applications ? meets or exceeds all jedec registered specifications ? t o or de r de vi ce s th at a r e te st ed a nd m a r k e d pe r v d e 08 84 r e q u i r em en t s, t h e suffix ?v? must be included at end of part number . vde 0884 is a test option. applications ? general purpose switching circuits ? interfacing and coupling systems of different potentials and impedances ? i/o interfacing ? solid state relays maximum ratings (t a = 25 c unless otherwise noted) rating symbol value unit input led reverse voltage v r 3 volts forward current ? continuous i f 60 ma led power dissipation @ t a = 25 c with negligible power in output detector derate above 25 c p d 120 1.41 mw mw/ c output transistor collector?emitter voltage v ceo 30 volts emitter?collector voltage v eco 7 volts collector?base voltage v cbo 70 volts collector current ? continuous i c 150 ma detector power dissipation @ t a = 25 c with negligible power in input led derate above 25 c p d 150 1.76 mw mw/ c total device isolation surge voltage (1) (peak ac voltage, 60 hz, 1 sec duration) v iso 7500 vac(pk) total device power dissipation @ t a = 25 c derate above 25 c p d 250 2.94 mw mw/ c ambient operating temperature range t a ? 55 to +100 c storage temperature range t stg ? 55 to +150 c soldering temperature (10 sec, 1/16 from case) t l 260 c order this document by 4n25/d globaloptoisolator ? schematic pin 1 . led anode 2. led cathode 3. n.c. 4. emitter 5. collector 6. base 1 2 3 6 5 4 standard thru hole 6 1 1. isolation surge voltage is an internal device dielectric breakdown rating. 1. for this test, pins 1 and 2 are common, and pins 4, 5 and 6 are common. 4n25 4n26 4n27 4n28
electrical characteristics (t a = 25 c unless otherwise noted) (1) characteristic symbol min typ (1) max unit input led forward voltage (i f = 10 ma) t a = 25 c t a = ? 55 c t a = 100 c v f ? ? ? 1.15 1.3 1.05 1.5 ? ? volts reverse leakage current (v r = 3 v) i r ? ? 100 a capacitance (v = 0 v, f = 1 mhz) c j ? 18 ? pf output transistor collector ? emitter dark current 4n25 ,26,27 (v ce = 10 v, t a = 25 c 4n28 i ceo ? ? 1 1 50 100 na (v ce = 10 v, t a = 100 c) all devices i ceo ? 1 ? a collector ? base dark current (v cb = 10 v) i cbo ? 0.2 ? na collector ? emitter breakdown voltage (i c = 1 ma) v (br)ceo 30 45 ? volts collector ? base breakdown voltage (i c = 100 a) v (br)cbo 70 100 ? volts emitter ? collector breakdown voltage (i e = 100 a) v (br)eco 7 7.8 ? volts dc current gain (i c = 2 ma, v ce = 5 v) h fe ? 500 ? ? collector ? emitter capacitance (f = 1 mhz, v ce = 0) c ce ? 7 ? pf collector ? base capacitance (f = 1 mhz, v cb = 0) c cb ? 19 ? pf emitter ? base capacitance (f = 1 mhz, v eb = 0) c eb ? 9 ? pf coupled output collector current (i f = 10 ma, v ce = 10 v) 4n25 ,26 4n27,28 i c (ctr) (2) 2 (20) 1 (10) 7 (70) 5 (50) ? ? ma (%) collector ? emitter saturation voltage (i c = 2 ma, i f = 50 ma) v ce(sat) ? 0.15 0.5 volts turn ? on time (i f = 10 ma, v cc = 10 v, r l = 100 ? ) (3) t on ? 2.8 ? s turn ? off time (i f = 10 ma, v cc = 10 v, r l = 100 ? ) (3) t off ? 4.5 ? s rise time (i f = 10 ma, v cc = 10 v, r l = 100 ? ) (3) t r ? 1.2 ? s fall time (i f = 10 ma, v cc = 10 v, r l = 100 ? ) (3) t f ? 1.3 ? s isolation voltage (f = 60 hz, t = 1 sec) (4) v iso 7500 ? ? vac(pk) isolation resistance (v = 500 v) (4) r iso 10 11 ? ? ? isolation capacitance (v = 0 v, f = 1 mhz) (4) c iso ? 0.2 ? pf 1. always design to the specified minimum/maximum electrical limits (where applicable). 2. current transfer ratio (ctr) = i c /i f x 100%. 3. for test circuit setup and waveforms, refer to figure 11. 4. for this test, pins 1 and 2 are common, and pins 4, 5 and 6 are common. 4 n 25 4 n 26 4 n 27 4n 28
i c , output collector current (normalized) typical characteristics figure 1. led forward voltage versus forward current 2 1.8 1.6 1.4 1.2 1 1 10 100 1000 10 1 0.1 0.01 0.5 1 i f , led forward current (ma) 2 5 10 20 50 i f , led input current (ma) v f , forward voltage (volts) 25 c 100 c t a = ? 55 c normalized to: i f = 10 ma figure 2. output current versus input current pulse only pulse or dc 10 7 5 2 1 0.7 0.5 0.2 0.1 ? 60 ? 40 ? 20 0 2 0 4 0 6 0 8 0 100 t a , ambient temperature ( c) i c , output collector current (normalized) 1 10 100 0.1 0 2 0 4 0 6 0 8 0 100 t a , ambient temperature ( c) t, time ( s) i 100 50 20 10 5 2 1 0.1 0 .2 0.5 1 2 5 10 20 50 100 i f , led input current (ma) ceo , collector ? emitter dark current (normalized) v ce = 30 v 10 v t f t r t r t f 0 v ce , collector ? emitter voltage (volts) i c , collector current (ma) 4 8 12 16 20 24 28 5 ma 2 ma 1 ma 01 2 3 4 5 6 7 8 910 figure 3. collector current versus collector ? emitter voltage figure 4. output current versus ambient temperature figure 5. dark current versus ambient temperature figure 6. rise and fall times (typical values) i f = 10 ma normalized to t a = 25 c normalized to: v ce = 10 v t a = 25 c v cc = 10 v r l = 1000 r l = 100 { { 4 n 25 4 n 26 4 n 27 4n28
100 70 50 20 10 7 5 2 1 0.1 0 .2 0.5 0 .7 1 2 5 7 10 20 50 70 100 i f , led input current (ma) r l = 1000 100 10 100 70 50 20 10 7 5 2 1 0.1 0.2 0.5 0 .7 1 2 5 7 10 20 50 70 100 i f , led input current (ma) r l = 1000 100 10 t , turn ? off time ( s) off t , turn ? on time ( s) on figure 7. turn ? on switching times (typical values) figure 8. turn ? off switching times (typical values) v cc = 10 v v cc = 10 v 6 6 a c, capacitance (pf) figure 9. dc current gain (detector only) figure 10. capacitances versus voltage 20 18 16 14 12 10 8 4 2 0 c ce f = 1 mhz 0.05 0.1 0 .2 0.5 1 2 5 10 20 50 v, voltage (volts) c led c cb c eb 5 a 4 a 3 a 2 a 1 a 4 3 2 1 024681012141618 20 v ce , collector ? emitter voltage (volts) i c , typical collector current (ma) i b = 7 a i f = 0 test circuit v cc = 10 v i f = 10 ma input r l = 100 ? output waveforms 10% 90% t on input pulse output pulse t f t off t r figure 11. switching time test circuit and waveforms 4 n 25 4 n 26 4 n 27 4n 28
package dimensions thru hole notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. style 1: pin 1. anode 2. cathode 3. nc 4. emitter 5. collector 6. base 64 13 ? a ? ? b ? seating plane ? t ? 4 pl f k c n g 6 pl d 6 pl e m a m 0.13 (0.005) b m t l m 6 pl j m b m 0.13 (0.005) a m t dim min max min max millimetersinches a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.115 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc j 0.008 0.012 0.21 0.30 k 0.100 0.150 2.54 3.81 l 0.300 bsc 7.62 bsc m 0 15 0 15 n 0.015 0.100 0.38 2.54 surface mount ? a ? ? b ? seating plane ? t ? j k l 6 pl m b m 0.13 (0.005) a m t c d 6 pl m a m 0.13 (0.005) b m t h g e 6 pl f 4 pl 31 46 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. dim min max min max millimetersinches a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.115 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc h 0.020 0.025 0.51 0.63 j 0.008 0.012 0.20 0.30 k 0.006 0.035 0.16 0.88 l 0.320 bsc 8.13 bsc s 0.332 0.390 8.43 9.90 *consult factory for leadform option availability 4 n 25 4 n 26 4 n 27 4n 28
*consult factory for leadform option availability notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 0.4" lead spacing 64 13 ? a ? ? b ? n c k g f 4 pl seating d 6 pl e 6 pl plane ? t ? m a m 0.13 (0.005) b m t l j dim min max min max millimetersinches a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.115 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc j 0.008 0.012 0.21 0.30 k 0.100 0.150 2.54 3.81 l 0.400 0.425 10.16 10.80 n 0.015 0.040 0.38 1.02 4 n 25 4 n 26 4 n 27 4n 28
life support policy fairchilds products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. www.fairchildsemi.com ? 2000 fairchild semiconductor corporation
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